PulseBlaster-The powerful, intelligent TTL pulse, pattern, word generator. Up to 24 independently controlled bits/channels (25 mA per channel); variable update rate; pulses/delays from 50 ns to nearly 2 years per instruction; resolution up to 10 ns (100 MHz system clock); up to 64k pulse/pattern program memory words (80 bit VLIW architecture). The entire logic design is contained in a single silicon chip, qualifying it as a system-on-a-chip (SOC) design – the industry’s first and only design of this kind.
PulseBlasterESR-The high speed, high-performance version of the PulseBlaster- versatile 24 channel pulse/pattern/word generator operating at clock speeds of up to 200 MHz. At 200 MHz, the PulseBlasterESR is capable of generating pulses/delays/intervals down to 25 ns per instruction.
PulseBlasterESR-PRO-At 500 MHz, the PulseBlasterESR-PRO is capable of generating pulses/delays/intervals ranging from 2.0 ns to 104 days per instruction, with a constant resolution of 2.0 ns.
500 MHz PulseBlasterESRMultiCore 8M Series-utilizes multiple PulseBlaster Cores implemented on a new series of PulseBlasterESR PCI boards. The MultiCoredesigns uses multiple proprietary PulseBlaster processor cores, specially designed for MultiCore operation on a single chip. These new designs allows the user to program and run independent programs on each core, up to 8388608 (8M) instructions in total, in parallel, while maintaining precise timing synchronization between the cores. At 500 MHz, these designs allow for 2.0 ns timing resolution.